Create: Molten Vents ReCreated A recreation of the "Create: Molten Vents" mod by Apothicon02 on GitHub/CurseForge
Updated 2026-02-08 20:19:11 -05:00
A renewable source of create's molten orestones.
Updated 2026-02-02 18:05:58 -05:00
Updated 2026-01-11 08:54:58 -05:00
A WIP RV32I emulator, aiming to eventually support RV64I + MAFDC extensions
Updated 2026-01-11 08:52:49 -05:00
iCESugar series FPGA dev board
Updated 2025-09-15 21:11:35 -04:00
Updated 2025-05-09 05:15:49 -04:00
A CHIP-8 interpreter in Zig to pass the time
Updated 2025-03-29 08:34:19 -04:00
A small machine/debug monitor written in Zig for RISC-V
Updated 2025-03-27 01:30:50 -04:00
Some Python 3 scripts to pack files efficiently for tapes (or other limited-space applications)
Updated 2025-03-20 08:33:44 -04:00
Firmware to drive an ultrasonic transducer (with additional circuitry) at resonance frequency of 1.7MHz. Built for the ESP32-C3 Super Mini.
Updated 2025-03-16 08:23:13 -04:00
FuKyu-Project/FuKyu
The FuKyu browser, built for sanity and stability
Updated 2025-03-14 22:43:44 -04:00
An attempt at a home-grown image format for the Gameboy Advance (specifically the GBA Pokemon games)
Updated 2025-03-07 06:48:38 -05:00
A rewrite of brv, a WIP RV32I emulator aiming to eventually support RV64I + MAFDC extensions
Updated 2025-03-07 06:43:12 -05:00
A C++ commandline for use in servers and chat software. Provides very simple asynchronous input/output.
Updated 2025-03-07 06:41:58 -05:00
Updated 2025-03-07 06:35:51 -05:00
Updated 2025-03-07 06:35:16 -05:00
Updated 2025-03-07 06:28:33 -05:00
Verilog file for a parameterized Carry Lookahead Adder (CLA), Lookahead Carry Unit and Generate/Propagate are combined
Updated 2025-03-07 06:13:15 -05:00
Verilog file for a parameterized Ripple Carry Adder (RCA)
Updated 2025-03-07 06:12:46 -05:00